When it's not the size of RAM that you need to enhance but its speed, you can add cache memory on the CPU side of RAM to take care of this. Cache is a very fast form of memory forged from static RAM. Cache improves system performance by predicting what the CPU will ask for next and prefetching this information before being asked. This paradigm allows the cache to be smaller in size than the RAM itself. Only the most recently used data and code or that which is expected to be used next is stored in cache. Cache on the motherboard is known as external cache because it is external to the processor, also referred to as Level 2 (L2) cache. Level 1 (L1) cache, by comparison, is internal cache because it is built into the microprocessor.
It is now common for chip makers to use extra space in the processor's packaging to bring the L2 cache from the motherboard closer to the CPU. When L2 cache is present in the processor's packaging, the cache on the motherboard is referred to as Level 3 (L3) cache.
The term L2 cache alone is not a definitive description of where the cache is located. The terms L1 cache and L3 cache do not vary in their meaning, however. The typical increasing order of capacity and distance from the processor die is L1 cache, L2 cache, L3 cache, RAM. This is also the typical decreasing order of speed.
As stated alwready Cache is a very fast chip memory that is used to hold data and instructions that are most likely to be requested next by the CPU. The L1 cache is generally of a smaller capacity in comparison to L2 cache, which is located on the motherboard or off-die in the same CPU packaging. When the CPU requires outside information, it thinks it requests that information from RAM. The cache controller, however, intercepts the request and consults its tag RAM to discover if the requested information is already cached, either in L1 or L2. If not, a cache miss is recorded and the information is brought back from the much slower RAM, but this new information sticks to the various levels of cache on its way to the CPU from RAM.
The backside bus (BSB), if present, is a set of signal pathways between the CPU and Level 2 or 3 cache memory. The BSB uses the same clock signal that drives the front side bus (FSB). If no backside bus exists, cache is placed on the FSB with the CPU and main memory.