To determine the number of processors in a machine open the Device Manager:
As can be seen here there are four AMD processors in this machine
Interrupts are used by peripherals to interrupt, or stop, the CPU and demand attention. When the CPU receives an interrupt alert, it stops whatever it's doing as soon as possible and handles the request, which is known as a Interrupt Service Routine. It is code that is called based on the interrupt. When simultaneous requests come in, special interrupt controller chips prioritize the competing requests, favoring lower interrupt numbers, making IRQ 0 the highest priority.
Above you can see external Programmable Interrupt Controls (PIC). Often these part of the CPU itself. Common interrupts are shown coming into the PICs
Interrupt 2 is a special case. Earlier XT-based PCs had only eight interrupts because those computers used a single interrupt controller chip. The controller chip has a single output line that connects to the interrupt line of the processor which is a single pin on the CPU. With the development of later hardware, a second interrupt controller chip was added, providing eight more interrupts, but no mechanism was in place to treat the second controller's output separately.
Rather than redesign the entire interrupt process, AT designers decided to use interrupt 2 on the original chip as a gateway to cascade to the second chip and interrupts 8-15. The second controller chip's output connects to interrupt 2 of the first chip. Interrupt 2, often used for early VGA adapters, was replaced by interrupt 9. As a result, you should never configure IRQ 2 for use in modern systems.
As already stated the CPU has a single interrupt line for the entire I/O system. Interrupt controller chips, such as model 8259 PICs, interface to this single line and arbitrate among their eight interrupt inputs, with lower interrupts having higher priority. Because the entire second controller chip replaces interrupt 2, its interrupts 8 to 15 replace IRQ2 in the hierarchy and are at a higher priority than interrupts 3 to 7. The result is that you can't simply use the numerical value of the interrupts to determine priority. Although lower IRQ values have higher priority in general, IRQ 15 is at a higher priority than IRQs 3-7, making it appear less than 3.
Each device is given its own interrupt to use when alerting the CPU. There are exceptions; PCI devices can share with one another, and USB devices all use a single interrupt. Most PCs have 16 interrupts defined. Given the limited number of available interrupts, this was once one of the greatest obstacles during system configuration, initially as well as during upgrades.
Hyperthreading refers to Intel's Hyper-Threading Technology (HTT). HTT is a form of simultaneous multithreading (SMT). SMT takes advantage of a modern CPU's superscalar architecture. Superscalar processors are able to have multiple instructions operating on separate data in parallel. HTT-capable processors appear to the operating system to be two processors. As a result, the operating system can schedule two processes at the same time, as in the case of symmetric multiprocessing (SMP), where two or more processors use the same system resources. The operating system must support SMP in order to take advantage of HTT. If the current process stalls because of missing data, the execution resources of the processor can be reallocated for a different process that is ready to go, reducing processor downtime.
Hyper-Threading looks like two processors to software