Southbridge

The southbridge chip typically implements the slower capabilities of the motherboard in a northbridge/southbridge chipset computer architecture. Intel calls the southbridge the I/O Controller Hub, while AMD has calls its southbridge Fusion Controller Hub (FCH).

Through this chip passes I/O (input/output) addresses, that represent a specific area of memory that a component, such as an external device, uses to communicate with the system. When an address is accessed by the CPU, it may refer to a portion of physical RAM, but it can also refer to memory of the I/O device. Thus, the CPU instructions used to access the memory can also be used for accessing devices. Each I/O device monitors the CPU's address bus and responds to any CPU access of an address assigned to that device, connecting the data bus to the desired device's hardware register.

Although I/O addresses sound quite a bit like memory addresses, the major difference is that memory addresses are used to store information that will be used by the device itself. I/O addresses are used to store information that will be used by the system or to represent instructions for the device from the CPU. For instance, the I/O address range 01F0-01F7 for the primary IDE controller acts as a set of instructions, allowing the CPU to control the activities of the IDE controller.

An I/O address is typically expressed using only the last four digits of the full address, such as 03E8, because the first four digits are always zeros. All I/O addresses fall within the first 640KB, starting at 0. Although the I/O addresses for a component are technically a range, such as 03E8-03EF for COM3, you usually refer to the base I/O address, just 03E8 in this case.

Hex Addresses
Common IO addresses